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ADV7611 Rev. D | Page 6 of 16 时序图 SDA SCL t5t3 t4t8 t6 t7t2 t1 t3 09305-003 t9 LLC t11 t12 t10 P0 TO P23, HS,VS/FIELD/ALSB, DE 09305-004 SCLK LRCLK I2SLEFT-JUSTIFIEDMODE I2SRIGHT-JUSTIFIEDMODE I2SI2S MODE MSBMSB – 1 t15 t16 t17 t19 t20 t18 MSBMSB – 1 LSBMSB t19 t20t19 t20NOTES 1. I2S IS A SIGNAL ACCESSIBLE VIA THE AP PIN. 09305-005 图3. I2C时序 图4. 像素端口和控制SDR输出时序 图5. I2S时序
