| Specifications | SC16C650B 5 V, 3.3 V and 2.5 V UART with 32-byte FIFOs and infrared \IrDA\ encoder/decoder \r\n NXP Semiconductors |
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| Specifications | SC16C650B 5 V, 3.3 V and 2.5 V UART with 32-byte FIFOs and infrared \IrDA\ encoder/decoder \r\n NXP Semiconductors |
| Business section |
| Specifications | SC16C650B 5 V, 3.3 V and 2.5 V UART with 32-byte FIFOs and infrared \IrDA\ encoder/decoder \r\n NXP Semiconductors |
| Outline | 1. General description 2. Features 3. Ordering information 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 6. Functional description 7. Register descriptions 8. Limiting values 9. Static characteristics 10. Dynamic characteristics 11. Package outline 12. Soldering of SMD packages 13. Abbreviations 14. Revision history 15. Legal information 16. Contact information 17. Contents |
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| Content | NXP SemiconductorsSC16C650B UART with 32-byte FIFOs and IrDA encoder/decoder © NXP B.V.2009.All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 14 September 2009 Document identifier: SC16C650B_4 Pleasebeawarethatimportantnoticesconcerningthisdocumentandtheproduct(s) described herein, have been included in section ‘Legal information’. 17.Contents 1General description. . . . . . . . . . . . . . . . . . . . . . 1 2Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3Ordering information. . . . . . . . . . . . . . . . . . . . . 2 4Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5Pinning information. . . . . . . . . . . . . . . . . . . . . . 4 5.1Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 6Functional description . . . . . . . . . . . . . . . . . . . 8 6.1Internal registers. . . . . . . . . . . . . . . . . . . . . . . . 9 6.2FIFO operation . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.3Hardware flow control. . . . . . . . . . . . . . . . . . . 10 6.4Software flow control . . . . . . . . . . . . . . . . . . . 10 6.5Special feature software flow control . . . . . . . 11 6.6Hardware/software and time-out interrupts. . . 11 6.7Programmable baud rate generator . . . . . . . . 12 6.8DMA operation . . . . . . . . . . . . . . . . . . . . . . . . 14 6.9Sleep mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.10Loopback mode . . . . . . . . . . . . . . . . . . . . . . . 14 7Register descriptions . . . . . . . . . . . . . . . . . . . 16 7.1Transmit Holding Register (THR) and Receive Holding Register (RHR) . . . . . . . . . . 17 7.2Interrupt Enable Register (IER) . . . . . . . . . . . 17 7.2.1IER versus receive FIFO interrupt mode operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.2.2IER versus receive/transmit FIFO polled mode operation. . . . . . . . . . . . . . . . . . . . . . . . 18 7.3FIFO Control Register (FCR) . . . . . . . . . . . . . 19 7.3.1DMA mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.3.1.1Mode 0 (FCR bit 3 = 0). . . . . . . . . . . . . . . . . . 19 7.3.1.2Mode 1 (FCR bit 3 = 1). . . . . . . . . . . . . . . . . . 19 7.3.2FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.4Interrupt Status Register (ISR). . . . . . . . . . . . 21 7.5Line Control Register (LCR). . . . . . . . . . . . . . 22 7.6Modem Control Register (MCR). . . . . . . . . . . 23 7.7Line Status Register (LSR). . . . . . . . . . . . . . . 25 7.8Modem Status Register (MSR). . . . . . . . . . . . 26 7.9Scratchpad Register (SPR) . . . . . . . . . . . . . . 27 7.10Enhanced Feature Register (EFR). . . . . . . . . 27 7.11SC16C650B external reset conditions . . . . . . 28 8Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 29 9Static characteristics. . . . . . . . . . . . . . . . . . . . 29 10Dynamic characteristics . . . . . . . . . . . . . . . . . 30 10.1Timing diagrams. . . . . . . . . . . . . . . . . . . . . . . 32 11Package outline . . . . . . . . . . . . . . . . . . . . . . . . 39 12Soldering of SMD packages . . . . . . . . . . . . . . 42 12.1Introduction to soldering. . . . . . . . . . . . . . . . . 42 12.2Wave and reflow soldering. . . . . . . . . . . . . . . 42 12.3Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 42 12.4Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 43 13Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 44 14Revision history . . . . . . . . . . . . . . . . . . . . . . . 44 15Legal information . . . . . . . . . . . . . . . . . . . . . . 47 15.1Data sheet status. . . . . . . . . . . . . . . . . . . . . . 47 15.2Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 15.3Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 47 15.4Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 47 16Contact information . . . . . . . . . . . . . . . . . . . . 47 17Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 |
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| Following Datasheets | SC16C750B (44 pages) SC16C751B (32 pages) SC16C752 (47 pages) SC16C752B (47 pages) SC16C754B (51 pages) SC16C850 (55 pages) SC16C850L (55 pages) SC16C850SV (48 pages) SC16C850V (48 pages) SC16C852L (64 pages) |
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