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Specifications
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38 Features Up to 300MHz Six-stage pipeline Dedicated integer division unit in hardware Optimized Floating Point Unit (FPU) E

Specifications
Outline	TriCore™ Family Concept TriCore™ Based Product Roadmap PRO-SIL™ Safety Concept TriCore™ for Powertrain Applications Gasoline Direct Injection Gasoline Multi-Port Injection Diesel Direct Injection Automatic Transmission–Hydraulic Control Dry Double Clutch Transmission–Hydraulic Control Dry Double Clutch Transmission–Electrical Control Integrated (H)EV Control (H)EV Battery Management System Embedded Software (AUTOSAR etc.) Development Support TriCore™ Tool Partners Feature Overview TriCore™ Family
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Content	38 Features Up to 300MHz Six-stage pipeline Dedicated integer division unit in hardware Optimized Floating Point Unit (FPU) Enhanced branch prediction (branch history and target buffers) Optimized crossbar interconnect with 64-bit data width (shared resource interconnect) 16-bit and 32-bit instruction formats 32-bit load-store Harvard architecture Superscalar execution Sustained throughput by dual 16x32 MACs SIMD (Single Instruction Multiple Data) packed arithmetic Zero overhead loops (loop recognition buffer) Features Moves data between any two memory or I/O locations Up to 200MHz Read-modify-write capabilities Full computation capabilities including basic MUL/DIV Reads/moves data and adds it to previously read data Reads two data values and performs arithmetic or logical operations and stores results TriCore™ TC1.6 Peripheral Control Processor (PCP2) DSP addressing modes and saturated math Beneﬁts Highest performance for complex engine management systems Integrated MCU-DSP instructions in one core Very fast context switching for interrupt driven system Fast and efficient processing of multiple tasks on one engine Low code size and inherent high level language support One development toolset for both MCU and DSP tasks Higher flexibility and lower cost Support and supply of complete system chipset Bit handling capabilities (testing, setting, clearing) Flow control instructions (conditional/ unconditional jumps, breakpoint) Beneﬁts Data preconditioning First level of defense for frequently occurring peripheral interrupts Programmable implementation of state machines Intelligent DMA assistance fE-Ray fCPU 1.3V/3.3V Ext. Supply OCDS L1 Debug Interface/JTAG Interrupts SDMA (8x safe DMA Channels) SHE FCE BMU STM SCU Ports External Request Unit GPT120 GPT121 SSC0 SSC1 SSC2 SSC3 SSCG SSC GuardianFADC DMA 2x 8 Channels 124KB D SPR 16KB DCACHE 128KB SRAMXBAR Data Memory i/fLMU 32KB D SPR 16KB ICACHE Program Memory i/f 2MB Flash 16KB DFlash 8KB BROM key Flash PMU 0 2MB Flash PMU 1 MLI0 16KB Parameter RAM 32KB Code Memory FPI-Bus Interface Interrupts PCP2 Core 200MHz Floating Point Unit MLI1 Bridge EBU MSC1 LVDS MSC0 LVDS CCU62 CCU63 SBCU CCU60 CCU61 PLLE-RAY FM-PLL MemCheck TriCore™ TC1.6 300MHz ASC0 FlexRay (2 Channels) SENT (8 Channels) MultiCAN (4 Nodes, 128 MO) ASC1 GPTA0 GPTA1 LTCA2 ADC0 ADC1 ADC2 ADC3 5V (3.3V supported as well) Ext. ADC Supply 3.3V (5V max) (3.3V max) Ext. FADC Supply fE-Ray fCPU 1.3V/3.3V Ext. Supply OCDS L1 Debug Interface/JTAG Interrupts SDMA (8x safe DMA Channels) SHE FCE BMU STM SCU Ports External Request Unit GPT120 GPT121 SSC0 SSC1 SSC2 SSC3 SSCG SSC GuardianFADC DMA 2x 8 Channels 124KB D SPR 16KB DCACHE 128KB SRAMXBAR Data Memory i/fLMU 32KB D SPR 16KB ICACHE Program Memory i/f 2MB Flash 16KB DFlash 8KB BROM key Flash PMU 0 2MB Flash PMU 1 MLI0 16KB Parameter RAM 32KB Code Memory FPI-Bus Interface Interrupts PCP2 Core 200MHz Floating Point Unit MLI1 Bridge EBU MSC1 LVDS MSC0 LVDS CCU62 CCU63 SBCU CCU60 CCU61 PLLE-RAY FM-PLL MemCheck TriCore™ TC1.6 300MHz ASC0 FlexRay (2 Channels) SENT (8 Channels) MultiCAN (4 Nodes, 128 MO) ASC1 GPTA0 GPTA1 LTCA2 ADC0 ADC1 ADC2 ADC3 5V (3.3V supported as well) Ext. ADC Supply 3.3V (5V max) (3.3V max) Ext. FADC Supply
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Following Datasheets	TRSF_XLRM_CD (1 pages) TRS_TRS_CD (1 pages) trusted-execution-technology-server-platforms-matrix-1 (8 pages) ts-1 (2 pages) ts-16949-site-penang (2 pages) ts-16949-site-regensburg (2 pages) TS16949-2 (3 pages) TS16949-RSE (1 pages) TS16949-RT (1 pages) TS16949-RZ (1 pages)
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