| Specifications | Implementing Three-State and Bidirectional Buses with Multiplexers in Actel FPGAs Rhonda |
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| Specifications | Implementing Three-State and Bidirectional Buses with Multiplexers in Actel FPGAs Rhonda |
| Business section |
| Specifications | Implementing Three-State and Bidirectional Buses with Multiplexers in Actel FPGAs Rhonda |
| Outline | Implementing Three-State and Bidirectional Buses w. |
| Suggested Link Details/Purchase | |
| Content | April 1997 5-85 © 1997 Actel Corporation Implementing Three-State and Bidirectional Buses with Multiplexers in Actel FPGAs Three-state logic is used in conventional MSI logic devices to allow buses where multiple drivers are directly connected to one or more loads. Figure 1 shows a typical bus configuration with TTL three-state bus drivers and registers. Each driving device has a control input that places all outputs in a high impedance state when asserted. (For the register, the control pin is OC; for the bus driver, there are two control pins, 1G and 2G). To prevent data collisions, only one driver can be active at a time; the other drivers must be in a high impedance state. The four NAND gates perform a logic decoding function to ensure that only one driver is active at a time. If the first bus driver is selected to be active via SELA and SELB, then the data bits W0 to W7 will drive the bus (BUS0 to BUS7). Similarly, the other data bits will be selected when the respective register is active. The loads on the bus are not shown in Figure 1. To make effective use of routing resources for many different applications, the Actel FPGA implements internal multiple drivers on a net with multiplexers instead of three-state logic. Figure 2 depicts the Actel implementation of the three-state bus discussed above. In this case, a 4-to-1 multiplexer is used for each bit of the bus to redirect the desired signal from one of four sources (W, X, Y, or Z). In addition to replacing the three-state nature of the MSI devices, the multiplexer eliminates the need for the LS241 bus drivers (inputs W and X). The desired source is selected by the two multiplexer select lines, which eliminate the need for the decoding logic used in the MSI implementation. For greater than four sources, the MX8 8-to-1 multiplexer can be used in a similar fashion. Figure 1• Three-State Bus Implementation with MSI Logic Application Note AC119 |
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| Following Datasheets | ThreeState_BoardTest_AN (2 pages) threew (1 pages) thrmobnd1500hrdner (4 pages) thrmobnd1500resin (4 pages) thrmobnd1600hrdner (4 pages) thrmobnd1600resin (4 pages) thrmtant (9 pages) Through-Hole-Printing (7 pages) thru-bolt-bracket (1 pages) THW826-4-UltiEVC_Programmer_s_Manual (40 pages) |
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