Specifications | SC16C750B 5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs NXP Semiconductors |
Business section |

Specifications | SC16C750B 5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs NXP Semiconductors |
Business section |
Specifications | SC16C750B 5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs NXP Semiconductors |
Outline | 1. General description 2. Features 3. Ordering information 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 4. Block diagram 5. Pinning information 6. Functional description 7. Register descriptions 8. Limiting values 9. Static characteristics 10. Dynamic characteristics 11. Package outline 12. Soldering of SMD packages 13. Abbreviations 14. Revision history 15. Legal information 16. Contact information 17. Contents |
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Content | SC16C750B_5© NXP B.V. 2008. All rights reserved. Product data sheetRev. 05 — 17 October 200842 of 44 NXP SemiconductorsSC16C750B 5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs 14.Revision history Table 30.Revision history Document IDRelease dateData sheet statusChange noticeSupersedes SC16C750B_520081017Product data sheet-SC16C750B_4 Modifications:•The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. •Legal texts have been adapted to the new company name where appropriate. •Section 2 “Features”, 3rd bullet item re-written; addedFootnote 1 •Figure 3 “Pin configuration for HVQFN32”: corrected pin7 signal name from “CS2” to “CS” •Table 2 “Pin description”, description ofRI: changed from “. has transitioned from a LOW to a HIGH .” to “. has changed from a LOW to a HIGH .” •Table 24 “Limiting values”: –symbol Vn split to show 2 separate conditions: “at D7 to D0 pins” and “at input only pins” •Table 25 “Static characteristics”: –Symbol/parameter changed from “VIL(CK), LOW-level clock input voltage” to “VIL(clk), clock LOW-level input voltage” –Symbol/parameter changed from “VIH(CK), HIGH-level clock input voltage” to “VIH(clk), clock HIGH-level input voltage” –Symbol changed from “ICL” to “IL(clk)” –Table note [1]: changed from “Except for x2, .” to “Except for XTAL2, .” •Table 26 “Dynamic characteristics”: –Symbol “tw2, t2w” changed to 2 separate symbols, “tw1” and “tw2” –Table note [4]: added “CS” to list of signals which must be inactive when reset pulse happens •Updated soldering information SC16C750B_420060825Product data sheet-SC16C750B-03 SC16C750B-03 (939775014453) 20041213Product data-SC16C750B-02 SC16C750B-02 (939775013318) 20040527Product data-SC16C750B-01 SC16C750B-01 (939775011969) 20040329Product data- |
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Following Datasheets | SC16C751B (32 pages) SC16C752 (47 pages) SC16C752B (47 pages) SC16C754B (51 pages) SC16C850 (55 pages) SC16C850L (55 pages) SC16C850SV (48 pages) SC16C850V (48 pages) SC16C852L (64 pages) SC16C852SV (48 pages) |
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