ds465 OPB Timer/Counter ds465 OPB Timer/Counter OPB timer/counter opb

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Specifications	ds465 OPB Timer/Counter ds465 OPB Timer/Counter OPB timer/counter opb_tc peripheral Xilinx, Inc.
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0 OPB Timer/Counter (v1.00b) DS465 December 2, 200500Product Specification DS465 December 2, 2005www.xilinx.com1 Product Spec

Specifications	ds465 OPB Timer/Counter ds465 OPB Timer/Counter OPB timer/counter opb_tc peripheral Xilinx, Inc.
Outline	OPB Timer/Counter (v1.00b) Introduction Features Functional Description Programming Model Timer Modes Interrupts Register Data Types and Organization Register Descriptions Implementation I/O Summary MPD File Parameters Device Utilization and Performance Benchmarks Parameterization Revision History
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Content	0 OPB Timer/Counter (v1.00b) DS465 December 2, 200500Product Specification DS465 December 2, 2005www.xilinx.com1 Product Specification © 2005 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and further disclaimers are as listed at http://www.xilinx.com/legal.htm. All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice. NOTICE OF DISCLAIMER: Xilinx is providing this design, code, or information as is. By providing the design, code, or information as one possible implementation of this feature, application, or standard, Xilinx makes no representation that this implementation is free from any claims of infringement. You are responsible for obtaining any rights you may require for your implemen- tation. Xilinx expressly disclaims any warranty whatsoever with respect to the adequacy of the implementation, including but not limited to any warranties or representations that this imple- mentation is free from claims of infringement and any implied warranties of merchantability or fitness for a particular purpose. Introduction This document describes the specifications for a timer/counter core for the On-Chip Peripheral Bus (OPB). The TC (Timer/Counter) is a 32-bit timer module that attaches to the OPB. Features •OPB v2.0 bus interface with byte-enable support •Supports 32-bit bus interface •Two programmable interval timers with interrupt, event generation, and event capture capabilities •Configurable counter width •One Pulse Width Modulation (PWM) output •Freeze input for halting counters during software debug LogiCORE™ Facts Core Specifics Supported Device Family QPro™-R Virtex™-II, QPro Virtex-II, Spartan™-II, Spartan-IIE, Spartan-3, Spartan-3E, Virtex, Virtex-II, Virtex-II Pro, Virtex-4, Virtex-E Version of Coreopb_timerv1.00b Resources Used MinMax Slices99200 LUTs99275 FFs105266 Block RAMs00 Provided with Core DocumentationProduct Specification Design File FormatsVHDL Constraints FileN/A VerificationN/A Instantiation TemplateN/A Reference DesignsNone Design Tool Requirements Xilinx Implementation Tools5.1i or later VerificationN/A SimulationModelSim SE/EE 5.6e or later SynthesisXST Support Support provided by Xilinx, Inc. Discontinued IP
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ds465 OPB Timer/Counter ds465 OPB Timer/Counter OPB timer/counter opb_tc peripheral Xilinx, Inc.

ds465 OPB Timer/Counter ds465 OPB Timer/Counter OPB timer/counter opb_tc peripheral Xilinx, Inc.

OPB Timer/Counter (v1.00b) Introduction Features Functional Description Programming Model Timer Modes Interrupts Register Data Types and Organization Register Descriptions Implementation I/O Summary MPD File Parameters Device Utilization and Performance Benchmarks Parameterization Revision History