| Specifications | Product Specification ds423 OPB Timebase WDT OPB timebase WDT TBWDT peripheral,Xilinx,QPro,Virtex,Spartan,timer,IP,cores Xilinx, Inc. |
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| Specifications | Product Specification ds423 OPB Timebase WDT OPB timebase WDT TBWDT peripheral,Xilinx,QPro,Virtex,Spartan,timer,IP,cores Xilinx, Inc. |
| Business section |
| Specifications | Product Specification ds423 OPB Timebase WDT OPB timebase WDT TBWDT peripheral,Xilinx,QPro,Virtex,Spartan,timer,IP,cores Xilinx, Inc. |
| Outline | OPB Timebase WDT (v1.00a) Introduction Features Operation Timebase Operation WDT Operation I/O Signals Parameterization MPD File Parameters |
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| Content | 0 OPB Timebase WDT (v1.00a) DS423 December 2, 200500Product Specification DS423 December 2, 2005www.xilinx.com1 Product Specification © 2005 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and further disclaimers are as listed at http://www.xilinx.com/legal.htm. All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice. NOTICE OF DISCLAIMER: Xilinx is providing this design, code, or information as is. By providing the design, code, or information as one possible implementation of this feature, application, or standard, Xilinx makes no representation that this implementation is free from any claims of infringement. You are responsible for obtaining any rights you may require for your implemen- tation. Xilinx expressly disclaims any warranty whatsoever with respect to the adequacy of the implementation, including but not limited to any warranties or representations that this imple- mentation is free from claims of infringement and any implied warranties of merchantability or fitness for a particular purpose. Introduction This document describes the specifications for a 32-bit free-running timebase and watchdog timer core for the On-Chip Peripheral Bus (OPB). The TimeBase WatchDog Timer (TBWDT) is a 32-bit peripheral that attaches to the OPB Features •OPB V2.0 bus interface with byte-enable support •Supports 32-bit, 16-bit, and 8-bit bus interfaces •Watchdog timer (WDT) with selectable timeout period and interrupt •Configurable WDT enable: enable-once or enable-disable •One 32-bit free-running timebase counter with rollover interrupt Functional Description The OPB Timebase WatchDog Timer (TBWDT) shown in Figure 1 consists of a free-running 32-bit timebase, read-only counter that always counts up from system reset. It is used for both general purpose timing and the WDT facility. The WDT timeout interval is determined by which bit in the timebase is used as input to the WDT state machine. LogiCORE™ Facts Core Specifics Supported Device Family QPro™-R Virtex™-II, QPro Virtex-II, Spartan™-II, Spartan-IIE, Spartan-3, Spartan-3E, Virtex, Virtex-II, Virtex-II Pro, Virtex-4, Virtex-E Version of Coreopb_timebase_wdtv1.00a Resources Used MinMax SlicesN/AN/A LUTs6363 FFs111111 Block RAMs00 Provided with Core DocumentationProduct Specification Design File FormatsVHDL Constraints FileN/A VerificationN/A Instantiation TemplateN/A Reference DesignsNone Design Tool Requirements Xilinx Implementation Tools 5.1i or later VerificationN/A SimulationModelSim SE/EE 5.6e or later SynthesisXST Support Support provided by Xilinx, Inc. Discontinued IP |
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