This module translates OPB transactions into PLBV46 transactions and functions as a slave on the OPB

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Specifications	This module translates OPB transactions into PLBV46 transactions and functions as a slave on the OPB \ side and a master on the PLBV46 side. Xilinx DS726 OPB to PLBv46 Bridge \v1.01a\, Data Sheet DS726,726,DS404,404,OPB,PLBv46,bridge,IP,cores Xilinx, Inc.
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Specifications	This module translates OPB transactions into PLBV46 transactions and functions as a slave on the OPB \ side and a master on the PLBV46 side. Xilinx DS726 OPB to PLBv46 Bridge \v1.01a\, Data Sheet DS726,726,DS404,404,OPB,PLBv46,bridge,IP,cores Xilinx, Inc.
Outline	OPB to PLBV46 Bridge (v1.01a) Introduction Features Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description Overview Clocking Deadlock Prevention OPB Slave Interface Single Transaction Bridging Address Decode Cycle Write Transactions Read Transactions PLBV46 Interface Reset Design Parameters Allowable Parameter Combinations Functional Description PLBv46 Master Burst IO Signals OPB Slave Interface PLBV46 Interface Reset Design Parameters Parameter-Port Dependencies Device Utilization and Performance Benchmarks Reference Documents Revision History
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Content	DS726 April 24, 2009www.xilinx.com1 Product Specification © 2007- 2009 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners. Introduction The On-Chip Peripheral Bus (OPB) to Processor Local Bus (PLB v4.6) Bridge module translates OPB transactions into PLBV46 transactions. It functions as a slave on the OPB side and a master on the PLBV46 side. The OPB to PLBV46 Bridge is necessary in systems where an OPB master device, such as a DMA engine or an OPB based coprocessor, requires access to high performance system resources on the PLBv46 bus. The Xilinx® OPB to PLBV46 Bridge design allows customers to tailor the bridge to suit their application by setting certain parameters to enable and disable features. The parameterizable features of the design are discussed in Design Parameters. Features The Xilinx OPB to PLBV46 Bridge is a soft IP core with the following features: •Bridge Functions -Uses 16-word deep posted write buffer to decouple OPB and PLBV46 transactions. -Uses 16-word deep read prefetch buffer to eliminate bridge related system lockup issues. •PLBV46 Master interface -32-bit native device width -Communicates with 32-bit, 64-bit, and 128-bit PLBV46 slaves -Non-burst transfers of 1 to 4 bytes -Uses fixed length, burst signaling of up to 16, 32-bit words. 0 OPB to PLBV46 Bridge(v1.01a) DS726 April 24, 200900Product Specification LogiCORE™ IP Facts Core Specifics See EDK Supported Device Families. Version of coreopb_plbv46_bridgev1_01_a Resources Used MinMax I/O390390 LUTs467898 FFs630720 Block RAMs00 Provided with Core DocumentationProduct Specification Design File FormatsVHDL Constraints FileN/A VerificationN/A Instantiation TemplateN/A Reference DesignsNone Design Tool Requirements Xilinx Implementation Tools See Tools for requirements.Verification Simulation Synthesis Support Provided by Xilinx, Inc.
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Following Datasheets	opb_sdram (32 pages) opb_spi (31 pages) opb_sysace (11 pages) opb_timebase_wdt (9 pages) opb_timer (13 pages) opb_uart16450 (15 pages) opb_uart16550 (19 pages) opb_v20 (32 pages) OPC (4 pages) open-fibre-channel-over-ethernet-for-linux-based-eternet-server-adapter-x520-brief (3 pages)
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This module translates OPB transactions into PLBV46 transactions and functions as a slave on the OPB \ side and a master on the PLBV46 side. Xilinx DS726 OPB to PLBv46 Bridge \v1.01a\, Data Sheet DS726,726,DS404,404,OPB,PLBv46,bridge,IP,cores Xilinx, Inc.

This module translates OPB transactions into PLBV46 transactions and functions as a slave on the OPB \ side and a master on the PLBV46 side. Xilinx DS726 OPB to PLBv46 Bridge \v1.01a\, Data Sheet DS726,726,DS404,404,OPB,PLBv46,bridge,IP,cores Xilinx, Inc.