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Specifications
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1PS9001A 03/17/10 Features • Phase-Lock Loop Clock Distribution (Zero Input-to-Output Delay) • Internal feedback

Specifications
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Content	1PS9001A 03/17/10 Features • Phase-Lock Loop Clock Distribution (Zero Input-to-Output Delay) • Internal feedback connection • Distributes one to one bank of ﬁve outputs • High-Performance • 30 MHz to 220 MHz operation frequency range • <100ps output-to-output skew • <100ps cycle-to-cycle jitter • Low Power Consumption - 25mA (outputs unloaded) • Spread-spectrum capable • Power supply • +2.5V ±5% • +3.3V ±10% • Temperature range • -40°C to +85°C Industrial temp range • Packaging (Pb-free & Green): —8-pin TSSOP (L8) —8-pin SOIC (W8) Description The PI6C22405 is a low-jitter, low-skew, high-speed Zero-Delay Buffer with ﬁve outputs designed to address high-speed clock distribution applications. The PI6C22405 features an internal patented Phase Lock Loop (PLL) with high drive output capability and internal feedback. The PI6C22405 operates from a 2.5V±5% or 3.3V±10% supply, guaranteed over the full industrial temperature range of -40°C to +85°C. All support documentation can be found on Pericom’s web site at: www.pericom.com. Pericom can customize these devices for speciﬁc requirements. 2.5/3.3V 220MHz Zero-Delay Clock Buffer with 5 Outputs PI6C22405 PLL REF CLKOUT CLK 1 CLK 2 CLK 3 CLK 4 Block Diagram 1 2 3 GND4 CLK1 CLKOUT VDD CLK3 8 7 6 5 REF CLK2CLK4 Pin Conﬁguration Pin Description PinSignalDescription 1REFReference clock input with weak pull down. 2, 3, 5, 7 CLK2, CLK1, CLK3, CLK4, Clock output. Clock outputs contain a weak pull-down. 8CLKOUTClock output. Internal feedback on this pin. 4GNDGround 6VDDPower 10-0136
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Following Datasheets	PI6C22409-1H_2 (7 pages) PI6C22409_2 (7 pages) PI6C22510_2 (6 pages) PI6C2409-1H_2 (8 pages) PI6C2410_2 (6 pages) PI6C2504A_2 (4 pages) PI6C2509-133_2 (5 pages) PI6C2510-133E_2 (4 pages) PI6C4022_2 (6 pages) PI6C48533-01_2 (7 pages)
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