This data sheet outlines the LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI, which is a ful

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Specifications	This data sheet outlines the LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI, which is a fully co\ mpliant, customizable single-chip solution. Xilinx DS206 LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI, Data Sheet ds206, pci, 32-bit, intiator, target Xilinx, Inc.
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DS206 March 9, 2012www.xilinx.com13 ProductSpecification v3.167 & v4.16 LogiCORE IP 32-Bit Initiator/Target v3 & v4 f

Specifications	This data sheet outlines the LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI, which is a fully co\ mpliant, customizable single-chip solution. Xilinx DS206 LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI, Data Sheet ds206, pci, 32-bit, intiator, target Xilinx, Inc.
Outline	LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI Features Applications General Description Smart-IP Technology Functional Description I/O Interface Block User Application Configuration Space Parity Generator/Checker Initiator State Machine Target State Machine Supported Commands for PCI Bandwidth Recommended Design Experience Timing Specifications Support Ordering Information Revision History Notice of Disclaimer
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Content	DS206 March 9, 2012www.xilinx.com13 ProductSpecification v3.167 & v4.16 LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available “AS IS” and with all faults, Xilinx hereby DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising under, or in connection with, the Materials (including your use of the Materials), including for any direct, indirect, special, incidental, or consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same. Xilinx assumes no obligation to correct any errors contained in the Materials or to notify you of updates to the Materials or to product specifications. You may not reproduce, modify, distribute, or publicly display the Materials without prior written consent. Certain products are subject to the terms and conditions of the Limited Warranties which can be viewed at http://www.xilinx.com/warranty.htm; IP cores may be subject to warranty and support terms contained in a license issued to you by Xilinx. Xilinx products are not designed or intended to be fail-safe or for use in any application requiring fail-safe performance; you assume sole risk and liability for use of Xilinx products in Critical Applications: http://www.xilinx.com/warranty.htm#critapps. 4/19/1012.0Updated to v4.12 and to ISE v12.1. Added additional Spartan-6 FPGA part and package support. 4/19/1012.1Removed support for LX100 and LX110T devices. 7/23/1013.0 Updated to v4.12 and to ISE v12.1. Added support for Spartan-6 LX100 and LX110T devices. 9/10/1013.1Updated IP Facts Table to reflect correct “Resources Used.” 06/22/1113.2Updated to support ISE 13.2 software for core version v4.14. In Table1, removed Spartan-6 XC6SLX4-TQG144-2C/I device and added Spartan-6 FGG900, Kintex-7, and Virtex-7 devices. 10/19/1113.3Updated to support ISE 13.3 software for core version v4.15. •In Table1, corrected Kintex-7 FPGA device numbers and added new Kintex-7 devices. 01/18/1213.4Updated to support ISE 13.4 software for core version v4.16. •In Table1, added Artix-7 devices. 03/09/1213.5Removed XC7A30T and XC7A50T devices. DateVersionDescription of Revisions
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Following Datasheets	pci_64_ds205_1 (12 pages) PCN-1026_2 (1 pages) PCN-1027_2 (1 pages) PCN-1042_2 (2 pages) PCN-1084_2 (2 pages) PCN-2003-1028_2 (1 pages) PCN-2003-1029_2 (1 pages) pcn0005_1 (1 pages) pcn0404_2 (1 pages) pcn0407_1 (1 pages)
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This data sheet outlines the LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI, which is a fully co\ mpliant, customizable single-chip solution. Xilinx DS206 LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI, Data Sheet ds206, pci, 32-bit, intiator, target Xilinx, Inc.

This data sheet outlines the LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI, which is a fully co\ mpliant, customizable single-chip solution. Xilinx DS206 LogiCORE IP 32-Bit Initiator/Target v3 & v4 for PCI, Data Sheet ds206, pci, 32-bit, intiator, target Xilinx, Inc.