ACT-Q109_PA3-PIB_Feb09_v1.qxd Andrew Fukutome

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Specifications	ACT-Q109_PA3-PIB_Feb09_v1.qxd Andrew Fukutome
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—Lowest-Cost FPGA, Starting at $0.49 —Static Power as Low as 330 µW —40% Reduction in Dynamic Power (r

Specifications	ACT-Q109_PA3-PIB_Feb09_v1.qxd Andrew Fukutome
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Content	—Lowest-Cost FPGA, Starting at $0.49 —Static Power as Low as 330 µW —40% Reduction in Dynamic Power (relative to 1.5 V) with 1.2 V Support —Ultra-Low-Power Flash*Freeze Support —Optimized for High Performance —Free ARM Cortex-M1 (ARM FPGA processor) Support for All Devices —Cost-Optimized, Reprogrammable, and Nonvolatile —1,024 Bits of User Flash Memory —Single-Chip and Live at Power-Up —In-System Programming (ISP) with Optional On-Chip AES Decryption —Firm-Error Immune The ProASIC3 families of flash FPGAs offer a breakthroughin power,price, performance,density,and features for today’s most demanding high-volume applications.ProASIC3 devices support the ARM7™and ARM®Cortex™-M1 soft processor IP cores,offering the benefits of programmability and time-to-market at costs as low as $0.49.The ProASIC3 families are based on nonvolatile flash technology and support 10 k to 3 M gates and up to 620 high-performance I/Os. THE INDUSTRY’SLOW-POWER FPGAs Low-Power Use Single-Chip Nonvolatile Live at Power-Up Secure On-Chip NVM Firm-Error Immune Reprogrammable No NRE ISP Easy Prototyping Fast Time to Market Key Features SRAM FPGAs ASICs
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Following Datasheets	PA3_E_Tech_WP_1 (18 pages) pabp_01 (5 pages) pabp_02 (7 pages) package_diode_5 (5 pages) packaging_auto_1 (18 pages) PAH_Free_Conformance-1_2 (1 pages) pajp_01 (5 pages) pajp_02 (5 pages) ParkGroup (4 pages) pbga-400ld_1 (1 pages)
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