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| Specifications | Performance analysis of Virtex\222-II Pro X RocketIO\222 MGTs driving data over Samtec QTE/QSE Series\ High Speed connectors and EQCD-EQDP Series High Data Rate cable assemblies. Xilinx RPT015 Test Results: RocketIO\222 MGTs with High-Speed Samtec QTE/QSE Connectors and EQCD-EQDP\ Cable Assemblies Virtex-II Pro X, RocketIO, MGTs, Samtec, QTE, QSE, EQCD, EQDP, Bit Error Rate. XBERT Xilinx, Inc. |
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| Specifications | Performance analysis of Virtex\222-II Pro X RocketIO\222 MGTs driving data over Samtec QTE/QSE Series\ High Speed connectors and EQCD-EQDP Series High Data Rate cable assemblies. Xilinx RPT015 Test Results: RocketIO\222 MGTs with High-Speed Samtec QTE/QSE Connectors and EQCD-EQDP\ Cable Assemblies Virtex-II Pro X, RocketIO, MGTs, Samtec, QTE, QSE, EQCD, EQDP, Bit Error Rate. XBERT Xilinx, Inc. |
| Outline | Test Results: RocketIO MGTs with High- Speed Samtec QTE/QSE Connectors and EQCD-EQDP Cable Assemblies General Description Hardware Platform Equipment Used Description of Channel Channel Details: Summary Revision History |
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| Content | 10www.xilinx.comRPT015 (v1.0) August 10, 2005 Summary R SummaryThe RocketIO transceivers performed flawlessly over various lengths of Samtec s QTE/QSE Series high-speed connectors and EQCD-EQDP series high data-rate cable assemblies at 3.125Gb/s, 5.0Gb/s, and 10Gb/s. The flexibility and programmability of the RocketIO transmitters and receivers allow them to be optimized for robust error-free operation. The ability to run error-free at 10.0Gb/s shows that a significant amount of margin is available to systems running at lower speeds such as 1 to 3.125Gb/s or 5 to 6Gb/s. NOTES: 1.All testing was done at room temperature. The ability to test over temperature was not available at the time these tests were performed. 2.All testing was done with the same device and evaluation board. 3.It is manadatory that proper signal integrity design methods be followed if results like these are to be achieved at high data rates. Revision History The following table shows the revision history for this document. DateVersionRevision 08/10/051.0Initial Xilinx release. |
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| Following Datasheets | app_notes_ULN (4 pages) app10_xaui_DPAx (11 pages) Apparent_Impedance_Webinar_062205_rev1 (91 pages) appendix-b (1 pages) appendix-f (1 pages) AppendixA (1 pages) AppendixBC (1 pages) AppendixD (1 pages) AppendixDE (1 pages) Appendix_A (3 pages) |
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