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Content | Document Number: 69294www.vishay.com Revision: 27-Apr-091 VISHAY SILICONIX Power MOSFETsApplication Note 910 Power MOSFET Failures in Automotive Applications APPLICATION NOTE By Kandarp Pandya, Klaus Pietrczak, Arthur Chiang, Greg Getzan There is no more demanding environment for power MOSFETs than automotive systems. As the components controlling the power for on-board electronics, MOSFETs in automotive systems are frequently used close to their electrical and thermal absolute maximum ratings in an effort to maximize power-to-weight ratios, i.e. to minimize material usage and minimize the physical volume of circuitry, in addition to cutting costs. Design engineers have at their disposal sophisticated analysis tools to verify the adequacy of each component. Failure rates are extremely low, on the order of a few per million. The rarity of failure makes it extremely difficult to identify the cause of those failures that do occur. Collaborative efforts from both power MOSFET manufacturers and automotive design and manufacturing houses are required to reach successful solutions, and in many cases, proving the effectiveness of these solutions is extremely difficult due to the low failure rates involved. Battery connect/disconnect switches implemented with power MOSFETs as a high-side switch (figure 1) are an example of circuits that experience a failure rate of a few parts per million. In this application, the drain of the MOSFET is permanently connected to the vehicle battery; the floating gate drive comes from a custom ASIC chip. The output voltage of the ASIC tracks the source potential and maintains the required gate drive voltage. However, the ASIC often has limited current sourcing capabilities. The source feeds into the other circuit controls; it also powers MOSFETs connected in parallel. In many cases, this load is inductive, with or without recirculation of its stored energy. An understanding of the susceptibility of the MOSFET in this application requires studying the prime suspects, such as load dumping from a bad connection on the battery, the gate drive capabilities of the ASIC, and inductive surges from parallel connected loads on the source (the lower leg). Invariably, the results from circuit analysis are negative, with no clear root cause of device failure. This is not surprising since failures are so rare and measured in the low parts-per-million. Failure analysis performed at MOSFET manufacturing facilities can provide further insights into the actual device failure mechanisms. Basic electrical tests can indicate gate-to-source, gate-to-drain, and drain-to-source leakages with low resistance values. Examples of systematic decapsulation of failed devices are shown in figures 2 to 7. It can be observed that failures occur in two areas of the MOSFET structure. One failure is from gate metal to drain poly and the other failure is from source metal to gate poly. The conclusion from the analysis is that some voltage transient occurs on the gate and leads to the failure. Excluding the cases of obvious processing anomalies, investigations into the manufacturing processes have shown that these items are unlikely to be the cause of failure. The reasoning behind this conclusion takes into account the very low failure rates seen and fact that individual failures tend to occur across multiple wafer and assembly lots. Process investigation into the history of failed devices invariably shows that all critical parameters were well within the normal distribution, and corresponding final production test data were free from any objectionable deviations. At this point, every device is like every other device in all measurable ways. For the root cause analysis, the key question is what kind of electrical transient could lead to such a failure? The failure is clearly caused after the device has completed the manufacturer s production testing, which significantly limits the possible causes of inducing failure. Device failure after this operation could be a result of handling or an actual application issue. ESD testing to evaluate handling problems, followed by failure analysis, has not produced identical failure signatures. Similarly, application analysis and assembly level testing has yielded no clue to the definition of a critical electrical condition which reproduces the identical failure signature. In both of these cases (ESD and application evaluation), failures can be generated which involve similar structures as actual field failures, but the damage level seen in the in-house overstressing is higher than that generated from the field. |
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